Ferric Process and Inductors

Ferric's magnetic core topologies provide >5A/mm2 current density and utilization factor near 100%.

Ferric’s patented magnetic core inductor process and designs are integrated on top of the chip or interposer, providing flexibility in integration and implementation.

By integrating Ferric inductors with TSMC's CMOS 'back-end-of-line' (BEOL) we enable efficient, high density on-chip/on-package power conversion at any process node. 

Our technology reduces: 

  • Logic board space
  • Resistive losses in power distribution networks while improving power management
  • Overall bill of materials (BOM)

Ferric Inductor Libraries

A full library of fixed inductor designs for a broad range of current, voltage and density requirements will soon be available through Ferric's foundry partner, TSMC. The layouts are optimized for high inductance, high current density, and low inductor series resistance (RSL).

Experimentally verified broadband circuit models will be provided for ease of integration.