EDA/Layout Engineer

As a Ferric EDA/Layout Engineer, you will be part of a fast-paced and motivated team working on cutting edge integrated voltage regulators. Your primary responsibilities will be to enable to the IC design team by maintaining and optimizing the EDA/PDK infrastructure. You will also contribute on the physical design front by helping to layout and verify analog/mixed-signal blocks.

Primary Responsibilities:

  • Maintain EDA infrastructure and assist engineers in the installation and setup of EDA tools

  • Install and maintain PDKs and 3rd party IP libraries such as standard cells and IO/ESD

  • Write and verify custom DRC, LVS, and PEX verification rules

  • Develop scripts to automate design engineer problems

  • Help to maintain linux computing infrastructure used by engineering team

  • Layout analog/mixed-signal blocks

  • Develop and verify custom pcells

Minimum Qualifications:

  • A Bachelor or Master's degree in Electrical Engineering or a related discipline

  • Minimum of 4 years experiencing in EDA support

  • Proficiency in writing Skill, Python, Tcl, and Shell scripts

  • Strong understanding of computer systems, networks, and Redhat Linux operating system

  • Experience with tools from major EDA companies such as Cadence, Synopsys, Mentor Graphics, MathWorks, Cliosoft, Ansys, etc.

  • Experience working with PDKs in process nodes from TSMC 130nm down to 7nm

  • Ability to layout analog and mixed-signal circuits

  • Experience creating custom pcells using Skill

Desired Characteristic & Attributes:

  • Passionate, self-starter with strong commitment to flawless execution

  • Excellent written and verbal communication skills required

  • Ability to work well with others in a fast-paced collaborative team environment

Who we are:

  • Ferric is a technology startup based in New York City that is pioneering an entirely new approach to power delivery for Integrated Circuits and Electronic Assemblies. This approach leverages Ferric’s integration of thin-film magnetic inductors with CMOS semiconductor technology to enable a significant improvement in the integration density and efficiency of voltage regulators (VRs) compared with current commercially available technologies.


  • New York, NY

How to apply:

Ferric is unable to provide sponsorship for employment visa status for this position.